1. Field of the Invention
The present invention relates to a semiconductor device having a high packaging density.
2. Description of the Prior Art
Demand for smaller size circuits and higher packaging density has been increasing in recent years. Such demand is particularly strong in the field of integrated circuits (IC's). Because of this, various techniques have been proposed for finely fabricating circuit elements.
The techniques for finely fabricating transistors and diodes have become considerably advanced. Techiniques for fabricating transistors and diodes, however, cannot be applied to resistors. This is because each resistor must provide a specified design value of resistance. The resistance value is determined by the physical configuration of the resistor, e.g., its length and width. Therefore, the maintenance of a proper physical configuration takes priority over the fine fabrication of the resistor. This limits the degree of fine fabrication of resistors to some extent.
In the prior art, two methods have been proposed for arranging the resistors for fine fabrication. These methods, explained later, however, have certain problems. According to the first method, large dummy spaces are left between the resistors on the semiconductor substrate. According to the second method, the resistance value of each resistor cannot be obtained with a high degree of accuracy.